1. Field of the Invention
The present invention relates in general to information handling systems and, more particularly, to hardware logic and processing methods for enhanced data manipulation within a raster graphics display system. Still more particularly, the present invention relates to a system in which the memory controller within a raster graphics display system is highly flexible and allows for dynamic definition of the contents of the associated frame buffers on a per pixel basis.
2. Background and Related Art
Computer graphics display systems, e.g., CAD/CAM graphics workstations, are widely used to generate and display two-dimensional (2D) representations of three-dimensional (3D) objects for scientific, engineering, manufacturing and other applications. Typically, a graphics display system is subdivided into a geometry processor subsystem and a rasterization subsystem which are interconnected such that commands and data are processed through the subsystems in a pipeline manner. Ever present demands for higher quality rendering and more complicated images continually require greater computational flexibility of such systems.
However, these requirements for more and more frame buffer resources force the price of graphics systems ever higher. A typical application may require over 100 bits of data per pixel. More problematically, different applications may require different types of bit planes; one application, for example, may require multiple sets of overlay planes, while another application may require fill control planes for controlling area fills of polygons. To provide a number of dedicated bit planes sufficient for every application would require an unacceptably large number of bit planes.